Merge branch 'feature/multi_threading' into develop

Author: eyck

CMakeLists.txt

@@ -114,7 +114,7 @@ if(IS_DIRECTORY "${PROJECT_SOURCE_DIR}/../dbt-rise-custom")
         list(APPEND LIB_DEFINES CORE_${CORE})
     endforeach()
 
-    message(STATUS "Core defines are ${LIB_DEFINES}")
+    #message(STATUS "Core defines are ${LIB_DEFINES}")
 
     if(WITH_LLVM)
         FILE(GLOB LLVM_GEN_SOURCES ${CMAKE_CURRENT_SOURCE_DIR}/../dbt-rise-custom/src/vm/llvm/vm_*.cpp)

CMakePresets.json

@@ -21,8 +21,7 @@
                 "CMAKE_EXPORT_COMPILE_COMMANDS": "ON",
                 "CMAKE_PROJECT_TOP_LEVEL_INCLUDES": "contrib/cmake/conan_provider.cmake",
                 "CONAN_HOST_PROFILE": "auto-cmake",
-                "CONAN_BUILD_PROFILE": "conan_host_profile",
-                "WITH_ASMJIT": "OFF"
+                "CONAN_BUILD_PROFILE": "conan_host_profile"
             }
         },
         {

src/main.cpp

@@ -210,8 +210,6 @@ int main(int argc, char* argv[]) {
         }
         if(clim.count("disass")) {
             vm->setDisassEnabled(true);
-            LOGGER(disass)::set_reporting_level(logging::DEBUG);
-            auto lvl = LOGGER(disass)::get_reporting_level();
             LOGGER(disass)::print_time() = false;
             auto file_name = clim["disass"].as<std::string>();
             if(file_name.length() > 0) {

src/sysc/core2sc_adapter.h

@@ -45,17 +45,20 @@
 #include <iss/iss.h>
 #include <iss/mem/memory_if.h>
 #include <iss/vm_types.h>
+#include <scc/async_event.h>
 #include <scc/report.h>
+#include <shared_mutex>
 #include <util/instance_logger.h>
 #include <util/ities.h>
+
 namespace sysc {
 template <typename PLAT> class core2sc_adapter : public PLAT, public sc2core_if {
 public:
     using this_class = core2sc_adapter<PLAT>;
     using core = typename PLAT::core;
     using reg_t = typename PLAT::reg_t;
     using phys_addr_t = typename PLAT::phys_addr_t;
-
+    using mutex_t = std::shared_mutex;
     core2sc_adapter(sysc::riscv::core_complex_if* owner)
     : owner(owner) {
         this->csr_rd_cb[iss::arch::time] = MK_CSR_RD_CB(read_time);
@@ -78,6 +81,18 @@ template <typename PLAT> class core2sc_adapter : public PLAT, public sc2core_if
         this->isslogger.set_logger(log_delegate);
     }
 
+    void setup_mt() override {
+        this->set_hartid = util::delegate<void(unsigned)>::from<this_class, &this_class::_set_mhartid_mt>(this);
+        this->set_irq_count = util::delegate<void(unsigned)>::from<this_class, &this_class::_set_irq_num_mt>(this);
+        this->get_mode = util::delegate<uint32_t()>::from<this_class, &this_class::_get_mode_mt>(this);
+        this->get_state = util::delegate<uint64_t()>::from<this_class, &this_class::_get_state_mt>(this);
+        this->get_interrupt_execution = util::delegate<bool()>::from<this_class, &this_class::_get_interrupt_execution_mt>(this);
+        this->set_interrupt_execution = util::delegate<void(bool)>::from<this_class, &this_class::_set_interrupt_execution_mt>(this);
+        this->local_irq = util::delegate<void(short, bool)>::from<this_class, &this_class::_local_irq_mt>(this);
+        this->register_csr_rd = util::delegate<void(unsigned, rd_csr_f)>::from<this_class, &this_class::_register_csr_rd_mt>(this);
+        this->register_csr_wr = util::delegate<void(unsigned, wr_csr_f)>::from<this_class, &this_class::_register_csr_wr_mt>(this);
+    }
+
     virtual ~core2sc_adapter() {}
 
     void register_unknown_instr_handler(util::delegate<iss::arch_if::unknown_instr_cb_t> handler) override {
@@ -227,16 +242,40 @@ template <typename PLAT> class core2sc_adapter : public PLAT, public sc2core_if
 
 private:
     void _set_mhartid(unsigned id) { PLAT::set_mhartid(id); }
+    void _set_mhartid_mt(unsigned id) {
+        std::unique_lock<mutex_t> lock(sync_mtx);
+        PLAT::set_mhartid(id);
+    }
 
     void _set_irq_num(unsigned num) { PLAT::set_irq_num(num); }
+    void _set_irq_num_mt(unsigned num) {
+        std::unique_lock<mutex_t> lock(sync_mtx);
+        PLAT::set_irq_num(num);
+    }
 
     uint32_t _get_mode() { return this->reg.PRIV; }
+    uint32_t _get_mode_mt() {
+        std::shared_lock<mutex_t> lock(sync_mtx);
+        return this->reg.PRIV;
+    }
 
     void _set_interrupt_execution(bool v) { this->interrupt_sim = v ? 1 : 0; }
+    void _set_interrupt_execution_mt(bool v) {
+        std::unique_lock<mutex_t> lock(sync_mtx);
+        this->interrupt_sim = v ? 1 : 0;
+    }
 
     bool _get_interrupt_execution() { return this->interrupt_sim; }
+    bool _get_interrupt_execution_mt() {
+        std::shared_lock<mutex_t> lock(sync_mtx);
+        return this->interrupt_sim;
+    }
 
     uint64_t _get_state() { return this->state.mstatus.backing.val; }
+    uint64_t _get_state_mt() {
+        std::shared_lock<mutex_t> lock(sync_mtx);
+        return this->state.mstatus.backing.val;
+    }
 
     void _local_irq(short id, bool value) {
         reg_t mask = 0;
@@ -264,6 +303,10 @@ template <typename PLAT> class core2sc_adapter : public PLAT, public sc2core_if
         if(value)
             SCCTRACE(owner->hier_name()) << "Triggering interrupt " << id << " Pending trap: " << this->reg.pending_trap;
     }
+    void _local_irq_mt(short id, bool value) {
+        std::unique_lock<mutex_t> lock(sync_mtx);
+        _local_irq(id, value);
+    }
 
     void _register_csr_rd(unsigned addr, rd_csr_f cb) {
         // we need to remap the callback as the cores expects reg_t size datat
@@ -275,17 +318,27 @@ template <typename PLAT> class core2sc_adapter : public PLAT, public sc2core_if
         };
         this->register_csr(addr, lambda);
     }
+    void _register_csr_rd_mt(unsigned addr, rd_csr_f cb) {
+        std::unique_lock<mutex_t> lock(sync_mtx);
+        _register_csr_rd(addr, cb);
+    }
+
     void _register_csr_wr(unsigned addr, wr_csr_f cb) {
         // we need to remap the callback as the cores expects reg_t size datat
         std::function<iss::status(unsigned addr, reg_t)> lambda = [cb](unsigned addr, reg_t r) -> iss::status { return cb(addr, r); };
         this->register_csr(addr, lambda);
     }
+    void _register_csr_wr_mt(unsigned addr, wr_csr_f cb) {
+        std::unique_lock<mutex_t> lock(sync_mtx);
+        _register_csr_wr(addr, cb);
+    }
 
     sysc::riscv::core_complex_if* const owner{nullptr};
     util::LoggerDelegate log_delegate;
     sc_core::sc_event wfi_evt;
     unsigned to_host_wr_cnt = 0;
     bool first{true};
+    mutex_t sync_mtx;
 };
 } // namespace sysc
 #endif /* _SYSC_CORE2SC_ADAPTER_H_ */